SANTA CLARA, Calif., Oct. 22, 2024 — RISC-V International has announced that the RVA23 Profile is now ratified. RVA Profiles align implementations of RISC-V 64-bit application processors that will run rich operating systems (OS) stacks from standard binary OS distributions.

RVA Profiles are essential to software portability across many hardware implementations and help to avoid vendor lock-in. The newly ratified RVA23 Profile is a major release for the RISC-V software ecosystem and will help accelerate widespread implementation among toolchains and operating systems.

As the steward of the RISC-V standard, RISC-V has more than 80 technical working groups that collectively advance the capabilities of the RISC-V ISA. RISC-V addresses the need for portability across vendors with standard ISA Profiles for applications and systems software. Each Profile specifies which ISA features are mandatory or optional, providing a common target for software developers.

Mandatory extensions can be assumed to be present, and optional extensions can be discovered at runtime and leveraged by optimized middleware, libraries, and applications. To be ratified, the RVA23 Profile underwent a lengthy development, review, and approval process across numerous working groups, before receiving the final ratification vote by the RISC-V Board of Directors.

“Profiles are the foundations of application and systems software portability across RISC-V implementations. A large software ecosystem is only possible with a standard Profile for software vendors to target and within which multiple suppliers can work together,” said Andrea Gallo, Vice President of Technology at RISC-V International. “Software vendors need portability to reduce their development and maintenance costs and enable them to successfully sell their software and services on a wide variety of RISC-V products. The ratification of RVA23 makes this happen.”

Key Components of RVA23 Include:

• Vector Extension: The Vector extension accelerates math-intensive workloads, including AI/ML, cryptography, and compression / decompression. Vector extensions yield better performance in mobile and computing applications with RVA23 as the baseline requirement for the Android RISC-V ABI.
• Hypervisor Extension: The Hypervisor extension will enable virtualization for enterprise workloads in both on-premises server and cloud computing applications. This will accelerate the development of RISC-V-based enterprise hardware, operating systems, and software workloads. The Hypervisor extension will also provide better security for mobile applications by separating secure and non-secure components.

RISC-V is experiencing tremendous momentum across established and emerging markets like space, AI/ML, automotive, data centers, embedded systems, HPC, and security. Some of the world’s most advanced technology companies are developing innovative, customized, and scalable solutions fueled by newly released RISC-V specifications.

At the same time, many talented engineers are being trained in RISC-V at top universities worldwide and are now entering the workforce. This combined effort between academia and the commercial sector has led to the rapid adoption of RISC-V. In fact, RISC-V processors will account for almost a quarter of the global market by 2030, according to recent research by Omdia. The industry standard RISC-V ISA is driving innovation across industries and shaping the future of computing.

“The RISC-V community has grown tremendously to more than 16,000 engineers around the world. The focus, collaboration, and investment of our members has truly formed the bedrock of computing for generations to come. RISC-V’s open standard is now propelling innovation across industries and implementations. Today’s announcement is a great milestone and further positions the RISC-V ISA as the future of computing,” said Calista Redmond, CEO of RISC-V International.

RISC-V International is hosting its annual RISC-V Summit North America this week, Oct. 22-23, 2024 at the Santa Clara Convention Center in Santa Clara, Calif. Registration is still open: click here to sign up and join the global RISC-V community to share technology breakthroughs, industry milestones, and case studies, as well as to network and build relationships.

All RISC-V members are welcome to join the Profiles Task Group Mailing List to keep informed. If you are not already a member, please become a member today.

About RISC-V

RISC-V International is the non-profit home of the RISC-V Instruction Set Architecture (ISA) standard, related specifications, and stakeholder community. More than 4,500 RISC-V members across 70 countries contribute and collaborate to define RISC-V specifications as well as convene and govern related technical, industry, domain, and special interest groups. RISC-V combines a modular technical approach with an open, royalty-free license model — meaning that anyone, anywhere can benefit from the IP contributed and produced by RISC-V. RISC-V enables the community to share technical investment, contribute to the strategic future, create more rapidly, enjoy unprecedented design freedom, and substantially reduce the cost of innovation.

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Source: RISC-V